According to Japanese Patent Application Laid-Open No. 2012-231011 (Patent Document 1), an extraction region is disposed between a transistor region and a termination region disposed around the transistor region in an insulated gate bipolar transistor (IGBT). A p-type layer is provided on an n−-type drift layer in the extraction region. The p-type layer is connected to an emitter electrode. A dummy gate electrode is provided on the p-type layer with an insulating film therebetween. The dummy gate electrode is connected to a gate electrode. A current density easily increases in a boundary between the extraction region and the termination region, namely, at an outer end of the p-type layer, during a turn-off operation of the IGBT. As a result, thermal breakdown may occur. A current breaking capability during the turn-off operation is limited by this phenomenon.
According to the description in the above-mentioned Patent Document 1, a lattice defect is introduced in the termination region. Thus, carrier annihilation in the termination region is facilitated, which reduces the carrier concentration in the extraction region during the turn-off operation of the IGBT. Therefore, the depletion from the p-type layer toward the collector is accelerated, and electric field strength decreases. As a result, the current breaking capability during the turn-off operation of the IGBT improves. On the other hand, no lattice defect is introduced in the extraction region. This intends to avoid an increase in ON-state voltage. As described above, the technology in the above-mentioned Patent Document 1 intends to improve the breaking capability during the turn-off operation without adversely affecting the ON-state voltage of the IGBT.